The invention concerns a method for generating electrical conducting or semiconducting structures in three dimensions in a composite matrix, wherein the matrix comprises two or more materials provided in spatially separate and homogenous material structures and wherein the materials in response to the supply of energy can undergo specific physical and/or chemical changes of state which cause transition from an electrical non-conducting state to an electrical conducting or semiconducting state or vice versa, or a change in the electrical conduction mode of the material. The invention also concerns methods for erasing electrical conducting or semiconducting structures generated in three dimensions in a composite matrix, wherein the matrix comprises two or more material provided in spatially separated and homogenous material structures, wherein the materials in response to the supply of energy can undergo specific physical and/or chemical changes of state which cause transitions from an electrical non-conducting state to an electrical conducting or semiconducting state or vice versa or a change in the electrical conduction mode of the material, wherein each material structure comprises a generated pattern of substantially two-dimensional electrical conducting or semiconducting structures represented by a determined protocol, and wherein electrical conducting or semiconducting structures in three dimensions can be generated anew in the matrix after erasure with the use of the method as stated in any of the claims 1-5 and 12-22 and according to another determined protocol for two-dimensional electrical conducting or semiconducting structures in each material structure, and a method for erasing globally electrical conducting or semiconducting structures generated in three dimensions in a composite matrix, wherein the matrix comprises two or more materials provided in spatially separate and homogenous material structures, wherein the materials in response to the supply of energy can undergo physical and/or chemical changes of states which cause transitions from an electrical non-conducting state to an electrical conducting or semiconducting state and vice versa or a change in the electrical conduction mode of the material, wherein electrical conducting or semiconducting structure in three dimensions can be generated anew in the matrix after erasing by using the method as stated in any of the claims 1-5 and 12-22 and according to another determined protocol for two-dimensional electrical conducting or semiconducting structures in each material structure.
More particularly the present invention concerns the fabrication of two- and three-dimensional isolating, resistive, conducting or semiconducting patterns and structures for use in electronic circuits which most particularly consist of a single or several stacked layers of thin films.
The evolution of microelectronic technology shows a steady trend towards smaller dimensions and reduced costs of the devices. Well-substantiated predictions show that the performance is going to increase, while the price per unit or device will decrease. However, today""s microelectronic technology is substantially based on crystalline silicon and shows an increasing tendency towards diminishing returns, mainly due to the inherent limitations associated with the complexity of ultra-high resolution lithography and increasing demands of the material processing. Extrapolations of the present technologies based on crystalline silicon may hence not be expected to offer dramatic breakthroughs in regard of either performance or price and future improvements shall require manufacturing plants and manufacturing equipment which are extremely capital-intensive.
Microelectronics based on thin-film technology may on the other hand confidently be predicted to deliver in the near future products representing real breakthroughs in regard of performance as well as of price. The shift from crystalline inorganic semiconductors to microcrystalline, polycrystalline or amorphous inorganic or organic semiconductors will introduce entirely novel boundary conditions with regard to the production of microelectronics and particularly by the blanks having form factors which make large areas possible, i.e. the substrates may be large sheets instead of wafers cut from blanks of limited size, and great flexibility with regard to architectures, something which will be essential factors in the expected development of tomorrow""s electronic technology. In the present invention special emphasis will be placed on the use of organic materials due to the ease whereby they may be processed with basis in the use of large areas and multilayer blanks with precisely controllable thickness, as well as their vast potential for chemical tailoring of the desired material properties.
Particularly before the use of electronics based on amorphous materials can fulfil their expected potential, further developments in certain areas are required. In the recent years an effort has been made to improve the semiconducting properties of organic semiconducting thin-film materials, which have given dramatic and rapid increase in the transistor performance up to a point where organic-based transistors may now compete with transistors based on amorphous silicon (see for instance Y.-Y. Lin, D. J. Gundlach, S. F. Nelson and T. N. Jackson, xe2x80x9cPentacene-Based Organic Thin Film Transistorsxe2x80x9d, IEEE Transactions on Electron Devices, August 1997). Other on-going projects will lead to coating processes for thin film in order to generate organic and amorphous silicon semiconductors at low temperatures and with compatibility with a broad range of organic and inorganic substrate materials. This has lead to the development of extremely cheap electronic devices with large areas based on the use of high-volume manufacturing methods.
In spite of this development a wholly satisfactory solution to how the fabrication technology shall be adapted and made suitable for a low-cost flexible high-volume production of electrical connections in the thin-film structures forming the electronic circuits is still lacking. Currently thin-film devices are based on amorphous silicon manufactured with current paths and conductors patterned with traditional methods such as lithography and vacuum metallization. The latter method has formerly also been applied to circuits for demonstration of organic-based semiconductor thin-film devices (see for instance A. R. Brown and al. xe2x80x9cLogic gates made from polymer transistors and their use of ring oscillatorsxe2x80x9d, Science 270: 972-974 (1995)). Alternatively, screen printing with conducting xe2x80x9cinkxe2x80x9d has been used to make transistors on flexible polymer substrates (see for instance F. Garnier and al., xe2x80x9cAll-polymer field-effect transistor realized by printing techniquesxe2x80x9d, Science 265:1884-1886 (1994)). Even though lithography may provide high resolution, it is relatively complex and includes typically wet chemistry steps which are undesirable in high-volume production of multilayer organic thin-film structures. Screen printing with ink is also far from ideal, as it only provides low to moderate resolution besides being a xe2x80x9cwetxe2x80x9d method.
As examples of prior art such it is evident from available patent literature may also be mentioned U.S. Pat. No. 5,043,251 (Sonnenschein et al.) which discloses a process for three-dimensional lithography of amorphous polymers for generating a momentary permanent pattern in a polymer material and which comprises steps for providing doped non-crystalline layers or films of a polymer in a stable amorphous state under humane operating conditions. In manufacturing the patterns the film is masked optically and is exposed through the mask to radiation with sufficient intensity to cause ablation of the exposed portions such that a distinct three-dimensional imprint is generated in the film. This process has among other been proposed for use in the manufacture of an optical data storage disk. Further it is from U.S. Pat. No. 5,378,916 (Mantell) known a photo-sensitive device in the form of a single-crystal structure, wherein different portions of the structure may have different compositions. Particular the structure forms a two-dimensional array and a first photosensitive portion comprises a material which generates electron-hole pairs when it is exposed to light within a predetermined first wavelength range, while another photosensitive portion comprises a material which is adapted to generate electron-hole pairs when it is exposed to light within another wavelength range distinctively different from the first wavelength range. Yet further it is from U.S. Pat. No. 5,677,041 (Smayling) known a transistor device which is made by forming a doped layer of radiation-sensitive material on a substrate. The radiation-sensitive material may among others be polyamid, polymer, an organic dielectric, a conductor or a semiconductor. The substrate may be silicon, quarts, gallium arsenide, glass, ceramic, metal or polyamid. A neutral or undoped layer of another radiation sensitive material is formed over the doped layer. First and second source/drain areas are then formed in the neutral layer and extend down to a top portion of the doped layer. A gate area is formed in the top portion of the neutral layer between the first source/drain area and the second source/drain area such that a channel area in the doped layer is provided under the gate area. Drain/source and gate electrodes as formed by irradiation of the uppermost neutral layer through a mask patterned in accordance with the desired electrode pattern and realized such that it intensity-modulates the radiation. In addition the mask may also be realized as a phase-shifting mask.
Finally it is from the article xe2x80x9cPolymeric integrated circuits and light-emitting diodesxe2x80x9d of D. M. de Leeuwe and al., IEDM, pp. 331-336 (1997) known a MISFET wholly realized in polymer and with the use of polymer materials which are given the desired electrical properties by an exposure to UV radiation. In the manufacture photochemical patterning of doped electrical conducting polyaniline films, so-called PANI thin films is used. The films are dissolved in a suitable solution, whereafter a photo-initiator is added to the solution which has been deposited on a suitable substrate such as a polyamide film. By thereafter exposing the PANI film to deep UV radiation through a mask the initially conducting polyaniline is converted in the exposed areas to the non-conducting leucoemeraldine form. The starting point here is accordingly a conducting polymer material, the area resistance of which initially is 1 kiloohm/square, but which after the exposure obtains an area resistance of more than 1013 ohm/square. In this manner dielectric structures may be generated in an otherwise conducting matrix. FIG. 1 shows a MISFET according to Leeuw and al. comprising a polyamide substrate 1 with a PANI thin film which after exposure to UV light through suitable masks forms isolating structures 6 in the otherwise conducting thin-film material 3. The still conducting areas 3 in the PANI film define respectively the source and drain electrode of a MISFET transistor. Above the PANI film a further layer 4 is deposited in the form of a thin film of polythienylenevinylene or PTV which is an organic semiconductor material. This layer 4 substantially determines the electrical parameter of the MISFET transistor. A film 5 of polyvinyl phenol PVP which forms the gate isolator of the transistor and is opaque to UV radiation and visible light is deposited over the PTV film 4. Another PANI film is again deposited on the top of the PTV film 5 and patterned by radiation with UV light such that isolating structures 6 are formed. A still electrical conducting area 2 forms the gate electrode of the MISFET structure.
If several transistors of this kind as mentioned above shall be combined in integrated circuits realized in the form of stacked film layers, vertical current paths between for instance source and drain electrodes in a transistor and the gate electrode in another transistor must be used. Such vertical current paths may in principle be realized mechanically, for instance by depositing a metal film over vertically etched steps in the structure. Otherwise a close analogy is the use of throughplated holes in circuit boards to realize a vertical connection between current paths on the upper and lower side of the circuit board.
The main object of the present invention is to provide improved fabrication methods for conducting connections and electrodes in microelectronic components and particularly microelectronic devices with large areas on flexible substrates by means of processes which combine high-volume fabrication at low costs. Particularly, it is an object of the invention to provide such fabrication methods that they may be used on layered physical devices, for instance in the form of a large number of adjacent stacked thin-film layers, thus generating three-dimensional circuit structures. The present invention will thereby make possible flexible and cheap, but simultaneously also singularly simple and precise fabrication of devices such as flat display devices, logic circuits, memory devices etc.
Further it is also an object of the invention to provide methods for erasing such three-dimensional circuit structures in situ, such that the material in the structures is converted back to an initial virgin state whereafter it anew may be reconfigured in the form of electrical conducting and semiconducting structures in three dimensions, but for instance with another pattern or another structure than the original.
The above-mentioned features and advantages are realized according to the present invention with a method characterized by irradiating each material structure with a radiation of a given intensity or frequency characteristic adapted to the specific response of the material to the energy supplied by the radiation, modulating the radiation spatially in each case according to a determined protocol which represents a predetermined pattern of electrical conducting or semiconducting structures in the relevant material structure, whereby in response to the energy supplied with the radiation two-dimensional electrical conducting or semiconductor structures are generated in the material structure with the pattern predetermined by the protocol, such that the composite matrix formed by separate adjacent material structures with two-dimensional electrical conducting or semiconducting structures is provided with electrical conducting or semiconducting structures in three dimensions. According to the invention it is advantageous selecting electromagnetic radiation used for the irradiation among one or more of the spectral ranges gamma, x-ray, ultraviolet, visible light, infrared and microwave, or selecting particle radiation used for the irradiation among one or more of the following types of particles, viz. elementary particles including protons, neutrons or electrons; ions, molecules or material aggregates.
Further it is according to the invention advantageous modulating the radiation spatially in a plane substantially parallel with a material structure, by means of a mask which is patterned according to the determined protocol, the mask modulating intensity and/or phase of the radiation incident thereto for generating electrical and semiconducting structures in the material structure, or modulating the radiation spatially in a plane substantially parallel with the material structure by concentrating the radiation into a beam with dimensions compatible with the dimensions of the electrical conducting or semiconducting structures and scanning the material structure with the beam which is intensity-modulated according to the determined protocol for generating two-dimensional electrical conducting or semiconducting structures in the material structure.
It is according to the invention advantageous generating the material structures in the form of thin layers and combining two or more layers into a laminated multilayer structure which constitutes the composite matrix with electrical conducting or semiconducting structures in three dimensions, preferably by generating the multilayer structure in a successive deposition of two or more layers into a stacked configuration on a carrier substrate or by laminating of two or more self-supporting layers into a stacked configuration. When the multilayer structure formed by successive deposition of two or more layers, it is advantageous generating the two-dimensional electrical conducting or semiconducting structures in a layer immediately after the deposition of the layer on the substrate or an adjacent layer and before depositing a further layer on the first-mentioned layer. In that connection preferably one or more two-dimensional electrical conducting or semiconducting structures are generated in the layer, such that they according to the protocol register with one or more two-dimensional electrical conducting or semiconducting structures generated in an adjacent, already deposited layer, whereby one or more vertical electrical conducting or semiconducting channels are generated in the cross-direction through the layers.
Further, when the multilayer structure is formed by lamination of two or more self-supporting layers, it is advantageous generating the two-dimensional electrical conducting or semiconducting structures in a layer before the layer is laminated to an adjacent layer. It is then advantageous positioning the layer in the lamination to an adjacent layer such that two or more two-dimensional conducting or semiconducting structures in the first-mentioned layer according to the protocol register with one or more two-dimensional electrical conducting or semiconducting structures in adjacent layers, whereby one or more vertical electrical conducting or semiconducting channels are formed in the cross-direction through the layers. Further it is according to the invention advantageous generating the two-dimensional electrical conducting or semiconducting structures in a layer after the deposition of all layers into a stacked configuration on a substrate or after the lamination of all layers into the stacked configuration has taken place, one or more, but not all layers in the stacked configuration being irradiated selectively in order to generate electrical conducting or semiconducting structures in the relevant selected layer or layers without causing a response in the non-selected layers. Preferably one or more layers for generating electrical conducting or semiconducting structure are selected by irradiating the selected layer or layers with radiation of specific radiation characteristics or a given power, the selected layer or layers being formed of a material which responds to one or more of the radiation characteristics and/or the power or combinations thereof.
It is according to the invention preferred that the specific radiation characteristics are intensity and/or frequency; one or more layers for generating electrical conducting or semiconducting structure preferably being selected by irradiation with electromagnetic radiation on two or more frequencies or within two or more wavelength bands, such that the irradiation on a given frequency or in a given wavelength band causes a response in one or more, but not all layers.
It is according to the invention also advantageous adding beforehand one or more additives which has a spectral absorption on a given frequency or in a given wavelength band, to the material in one or more layers in order to cause the response to the radiation on a given frequency or in a given wavelength band, at least two layers in the stacked configuration thereby obtaining mutually different absorption spectra, and then also generating the electrical conducting or semiconducting structure in a layer by the radiation absorption in the additive or additives in the layer forming reaction centres which cause a change in the electrical conductivity or conduction mode of the layer, or generating the electrical conducting or semiconducting structures in a layer by the radiation absorption in the additive or additives causing a heating with subsequent changes in the electrical conductivity or conduction mode of the heated layer material.
According to the invention the electrical conducting or semiconductor structures in two or more layers are advantageously generated in positions where one or more electrical conducting or semiconducting structures according to the protocol respectively form one or more vertical electrical conducting or semiconducting channels in the cross-direction through the layers in the stacked configuration, and then preferably providing according to the protocol the electrical conducting or semiconducting structures which form a vertical channel through the layer according in electrical conducting or semiconducting connection with one or more two-dimensional electrical conducting or semiconducting structures in this layer. Preferably each channel is formed with a conductivity or conduction mode which is constant between the layers or with a conductivity or conduction mode which varies between the layers.
Further the above-mentioned features and advantages are realized according to the present invention with a method for erasing which is characterized by irradiating each material structure with radiation of a given intensity and/or frequency characteristic adapted to the specific response of the material to the energy supplied by the radiation, and by modulating the radiation spatially in each case according to the protocol which represents the generated pattern of electrical conducting or semiconducting structures in the relevant material structure, whereby the two-dimensional electrical conducting or semiconducting structures present in the material structures in response to the energy supplied by the irradiation are erased according to the protocol, such that the material of the material structure thereafter in its entirety arrives in the electrical non-conducting state.
According to the invention it is advantageous that in the electromagnetic radiation used for the irradiation is selected among one or more of the spectral ranges gamma, x-ray, ultraviolet visible light, infrared and microwave; or selecting particle radiation used for the irradiation among one or more of following particles, viz. elementary particles including protons, neutrons and electrons; ions, molecules and material aggregates.
Further it is in the method for erasing according to the invention advantageous modulating the radiation spatially in a plane substantially parallel to a material structure by means of a mask which is patterned according to the determined protocol, the mask modulating intensity and/or phase of the radiation incident thereto for erasing the electrical conducting or semiconducting structures in the material structure or modulating the radiation spatially in a plane substantially parallel with the material structure by concentrating the radiation into a beam with dimensions compatible with the dimensions of the electrical conducting or semiconducting structures, and scanning the material structure by the beam which is intensity-modulated according to the determined protocol for erasing of electrical conducting or semiconducting structures in the material structure.
Where the material structures in the matrix are formed by thin layers in stacked configuration, it is advantageous irradiating one or more, but not all layers in the stacked configuration selectively for erasing electrical conducting or semiconducting structure in the selected relevant layer or layers without causing a response in the non-selected layers, and then one or more layers for erasing of electrical conducting or semiconducting structure preferably are selected by irradiating the selected layer or layers with specific radiation characteristics or a given power, the selected layer or layers being formed of material which responds to one or more of the radiation characteristics and/or the power or combinations thereof.
Finally the above-mentioned features and advantages according to the present invention is also realized with a method for global erasing which is characterised by irradiating the matrix globally with radiation with a given intensity and/or frequency characteristic adapted to the specific response of the material to the energy supplied by the radiation until the material in the matrix in response to the energy supplied by the irradiation in its entirety arrives in the electrical non-conducting state.
According to the invention it is in that connection advantageous selecting electromagnetic radiation used for the irradiation among one or more of the spectral ranges gamma, x-ray, ultraviolet, visible light, infrared and microwave or selecting particle radiation used for the irradiation among one or more of the following particle types, viz. elementary particles including protons, neutrons and electrons; ions, molecules and material aggregates.